Silicon wafers are manufactured by growing ingots by the CZ (Czochralski) method. Specifically, a quartz crucible is provided inside a CZ furnace, and polycrystalline silicon (Si) is heated and melted inside this quartz crucible. Once the melting stabilizes, an ingot of single crystal silicon is pulled out of the silicon melt inside the quartz crucible by a pulling mechanism.
Oxygen is eluted from the quartz crucible in the course of the melting, and this oxygen melts inside the ingot of single crystal silicon. Consequently, an ingot of single crystal silicon usually contains about 5×1017 to 2×1018 (atoms/cm3) (ASTM F121-79) of oxygen. In this Specification, numerical values for oxygen concentration will be as set forth in ASTM F121-79.
The molten portion consisting of the boundary between the melt and the single crystal ingot does not cool down as soon as it is pulled out, and instead is cooled through hysteresis. In the course of this hysteresis, holes become supersaturated under ordinary pulling conditions. These holes group together to form polyhedral cavity defects, called void defects, in an as-grown single crystal silicon ingot. Since the silicon ingot is in a state in which oxygen has been dissolved to the point of supersaturation, oxide films are formed during cooling on the inside of the cavities. Void defects are called grown-in defects because they are formed during single crystal growth by the CZ method. Defect pits produced by the appearance of void defects on the surface of a silicon wafer are called COPs.
Void defects adversely affect yield and the reliability of manufactured semiconductor devices when such devices are manufactured by adding device layers to a silicon wafer.
It is therefore necessary to eliminate void defects, and annealing a silicon wafer at a high temperature used to be considered the best approach to eliminating void defects. However, if silicon wafers are annealed one by one, there is the danger that thermal strain will be produced and the support members supporting the silicon wafers will be subjected to stress and lose some of their durability, or that crystal defects called slips will be produced.
The above problems have been solved by performing stack annealing rather than heat treating silicon wafers one at a time at high temperature, as disclosed in Japanese Patent Application Laid-Open No. 10-74771. Specifically, the above-mentioned application states the following.
(a) The disclosed invention discusses an attempt to eliminate void defects by laminating a plurality of silicon wafers into a group, vertically stacking one or more groups of silicon wafers, orienting the silicon wafers in each group, and performing a high-temperature heat treatment (stack annealing).
(b) It is stated that void defects are eliminated when silicon wafers are heat treated at a high temperature of between 1100 and 1380° C. In this case, it is stated that void defects are eliminated in any conceivable atmosphere for the heat treatment, such as an oxygen gas atmosphere, oxygen gas-containing atmosphere, inert gas atmosphere, or reductive gas atmosphere.
(c) Because stacked silicon wafers are difficult to separate after heat treatment, it is stated that separation after heat treatment can be facilitated by forming an oxide film on the silicon wafers ahead of time, and stack-annealing in an atmosphere of hydrogen or argon gas.
Thus, it used to be thought that void defects disappeared when silicon wafers were subjected to high-temperature heat treatment.
In view of this, the inventors of the present invention conducted follow-up tests under the temperature and atmosphere conditions given in the above-mentioned publication.
As a result, it was found that not only do void defects in silicon wafer not disappear, they actually become larger.
FIGS. 1b and 1c schematically illustrate the follow-up testing that was conducted.
As shown in FIG. 1b, the inventors first readied a silicon wafer (silicon substrate) 1 with a low oxygen concentration (an initial oxygen concentration of about 9×10−17 (atoms/cc)). As-grown void defects 3 with a diameter of about 100 nm were present in this silicon wafer 1.
This silicon wafer 1 was then subjected to ultra high temperature heat treatment at 1300° C. or higher in an oxygen gas atmosphere (in which the oxygen gas had a 100% oxygen partial pressure) or an oxygen gas-containing atmosphere (in which the oxygen gas had an oxygen partial pressure of at least 0.5%). As a result, it was confirmed that the void defects 3 in the as-grown silicon wafer 1 grew from a size of about 100 nm to about 500 nm. Also, as shown in FIG. 1c, silicon wafers 1 were stacked, and these stacked silicon wafers 1 were subjected to an ultra high temperature heat treatment at 1300° C. or higher and in the same oxygen gas atmosphere or oxygen gas-containing atmosphere, whereupon it was confirmed that once again the void defects 3 became larger around the outer periphery of the middle silicon wafers 1 and on the oxide film 2 side of the uppermost and lowermost silicon wafers 1.
When an ultra high temperature heat treatment is performed at 1300° C. or higher and in an atmosphere of argon gas or another such inert gas, or in an atmosphere of hydrogen gas or another such reductive gas, silicon oxides (SiOx) that sublimate and separate from the silicon wafer 1 foul the reaction tube or boat, and lead to the deterioration of the SiC boat itself. To prevent this furnace fouling and decrease in furnace durability, it is essential that when the high-temperature heat treatment at 1300° C. or higher be performed substantially in an oxygen gas-containing atmosphere or an oxygen gas atmosphere.